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== Die Speicherbelegung des 68HC908GP32 Microcontrollers der MegaSquirt == | == Die Speicherbelegung des 68HC908GP32 Microcontrollers der MegaSquirt == | ||
| + | <pre> | ||
$0000 - $003F = I/O Registers: 64 Bytes | $0000 - $003F = I/O Registers: 64 Bytes | ||
$0040 - $023F = RAM 512 | $0040 - $023F = RAM 512 | ||
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$FF7F - $FFDB = Unimplemented: 93 bytes | $FF7F - $FFDB = Unimplemented: 93 bytes | ||
$FFDC - $FFFF = Flash Vectors: 36 bytes | $FFDC - $FFFF = Flash Vectors: 36 bytes | ||
| + | </pre> | ||
Quelle: MegaManual unter http://www.megamanual.com/v22manual/mapp.htm#mem | Quelle: MegaManual unter http://www.megamanual.com/v22manual/mapp.htm#mem | ||
Aktuelle Version vom 20. April 2013, 14:04 Uhr
Die Speicherbelegung des 68HC908GP32 Microcontrollers der MegaSquirt
$0000 - $003F = I/O Registers: 64 Bytes $0040 - $023F = RAM 512 $0240 - $7FFF = Unimplemented 32,192 bytes $8000 - $FDFF = FLASH Memory: 32,256 bytes $FE00 = SIM Break Status Register (SBSR) $FE01 = SIM Reset Status Register (SRSR) $FE02 = Reserved (SUBAR) $FE03 = SIM Break Flag Control Register (SBFCR) $FE04 = Interrupt Status Register 1 (INT1) $FE05 = Interrupt Status Register 2 (INT2) $FE06 = Interrupt Status Register 3 (INT3) $FE07 = Reserved (FLTCR) $FE08 = FLASH Control Register $FE09 = Break Address Register High (BRKH) $FE0A = Break Address Register Low (BRKL) $FE0B = Break Status And Control Register (BRKSCR) $FE0C = LVI Status Register (LVISR) $FE0D - $FE0F = Unimplemented: 3 bytes $FE10 - $FE1F = Unimplemented: 16 bytes Note: Reserved for compatibility with monitor code for A-Family parts $FE20 - $FF52 = Monitor ROM: 307 bytes $FF53 - $FF7D = Unimplemented: 43 bytes $FF7E = Flash Block Protect Register (FLBPR) $FF7F - $FFDB = Unimplemented: 93 bytes $FFDC - $FFFF = Flash Vectors: 36 bytes
Quelle: MegaManual unter http://www.megamanual.com/v22manual/mapp.htm#mem